A 10 µF, 10 V X7R capacitor measured on a bench LCR meter at 0 V can read roughly 6.5 µF when installed on a 5 V rail. The difference is DC bias capacitance loss, a reversible voltage-dependent effect in Class 2 dielectrics. It does not consume lifetime by itself, but it changes the stress picture: ripple current, hot-spot temperature, and effective voltage margin all shift from the values used in the initial simulation. For engineers specifying MLCCs in power and industrial boards, the practical task is to plan around that shift so the part still meets its life target.
DC Bias Changes the Part You Actually Installed
In ferroelectric ceramics such as X7R, X5R, and Y5V, an applied DC field aligns the ferroelectric domains and reduces the available polarization change, so capacitance falls as the DC voltage rises. The effect is reversible: returning to 0 V restores the original value. C0G/NP0 is a Class 1 dielectric and shows no meaningful DC bias drop, which is why it is preferred in timing and filtering circuits.
Typical magnitudes vary by dielectric and case size. A 1 µF, 16 V X7R may lose roughly 20–40% of its capacitance at half rated voltage and 40–60% at rated voltage. Y5V can lose more than half at rated voltage. The loss is larger for higher capacitance density parts, so a small 0805 will drop more than a larger 1210 of the same value and rating.
The MLCC Lifetime Model in Plain Terms
MLCC wear-out is commonly described by an Arrhenius-type temperature acceleration combined with a power-law voltage acceleration. In plain terms:
- Life halves for every 10 °C increase in hot-spot temperature.
- Life decreases as (applied voltage / rated voltage) raised to the power n, with n typically between 2 and 4 for X7R.
- The datasheet endurance test — commonly 1000 h at rated voltage and 85 °C — is the reference point for relative comparisons.
DC bias does not appear directly in this model. Its effect is indirect: the capacitance loss under bias raises the ripple voltage and the RMS current through the capacitor for a given load step, which increases self-heating and the resulting hot-spot temperature. At the same time, operating at a high fraction of rated voltage raises the field stress in the dielectric. Both effects are captured by the voltage and temperature terms above.
Temperature and Ripple Derating: The Numbers That Matter
Hot-spot temperature is the sum of ambient temperature and self-heating from ripple current. The self-heating follows a simple relationship:
ΔT = I² × ESR × Rth
where I is the RMS ripple current, ESR is the equivalent series resistance at the switching frequency, and Rth is the thermal resistance from the hot spot to the ambient.
As an example, a 1210 X7R 10 µF, 25 V part with an ESR of about 20 mΩ at 100 kHz, carrying 2 A RMS ripple, dissipates 0.08 W. With a typical thermal resistance of 50 °C/W, that is a 4 °C temperature rise. Doubling the ripple current to 4 A RMS quadruples the dissipation to 0.32 W and raises the temperature by about 16 °C. The same logic applies when DC bias loss has reduced the effective capacitance: the circuit demands the same ripple current, but the smaller effective capacitance increases ripple voltage and can push the part into a higher stress regime.
Practical derating thresholds used in industrial designs:
- Keep applied DC voltage at or below 50% of rated voltage for X7R/X5R parts. Capacitance drop stays below roughly 20%, and voltage acceleration remains low.
- Keep hot-spot temperature at or below 85 °C for standard X7R, or 125 °C for X8R grades. Every additional 10 °C halves life.
- Limit ripple-induced self-heating to 10 °C or less at the maximum ambient temperature.
- Include initial tolerance (±10% or ±20%), DC bias loss, and aging (roughly −2.5% per decade hour for X7R) when checking the minimum capacitance at end of life.
Operating Conditions and Expected Life
The table below compares relative life for four operating sets, using the endurance condition as the 1× reference. Actual hours depend on dielectric grade, case size, and manufacturer, but the ratios show how strongly voltage and temperature drive the outcome.
| Operating set | Applied DC voltage | Ambient temp | Ripple ΔT | Hot-spot temp | Life vs reference |
|---|---|---|---|---|---|
| Endurance reference | 100% rated | 85 °C | 0 °C | 85 °C | 1× |
| Voltage derated | 50% rated | 85 °C | ~0 °C | 85 °C | ~5× |
| Voltage + temperature derated | 50% rated | 65 °C | 10 °C | 75 °C | ~10× |
| High electrical + thermal stress | 80% rated | 95 °C | 15 °C | 110 °C | ~0.3× |
Design rules that follow from this picture:
- Measure effective capacitance at the actual DC operating voltage, not at 0 V, when validating a prototype.
- Select a voltage rating at least twice the maximum DC bus voltage, including transients.
- Verify ripple current at the switching frequency of the application; ESR varies with frequency and temperature.
- Parallel several smaller MLCCs instead of one large part to reduce ESR and spread self-heating.
- Use C0G/NP0 where capacitance stability is critical, and reserve X7R/X5R for bulk decoupling with derating.
- Ask the manufacturer for DC bias curves and impedance data before qualification, and confirm RoHS/REACH compliance documentation with your distributor.
